THE PROPOSED PHASE I OBJECTIVES AND WORK PLAN, CARRIED THROUGH TO COMPLETION, WILL RESULT IN THE DEVELOPMENT OF A RAD-TOLERANT, HIGH-SPEED, MULTI-CHANNEL FIBER OPTICS TRANSCEIVER, ASSOCIATED RECONFIGURABLE INTELLIGENT NODE COMMUNICATIONS ARCHITECTURE, AND SUPPORTING HARDWARE FOR INTRA-VEHICULAR AND GROUND-BASED OPTICAL NETWORKING APPLICATIONS WITH DATA RATES EXCEEDING 3.2GBPS PER CHANNEL. THE GOALS OF THIS PROPOSED PROGRAM ARE PERFECTLY IN-LINE WITH THE SUBTOPIC GOALS, WHICH ARE TO: "(1) DEVELOP HIGH-PERFORMANCE PROCESSORS AND MEMORY ARCHITECTURES AND RELIABLE ELECTRONIC SYSTEMS, AND (2) DEVELOP AN AVIONICS ARCHITECTURE THAT IS FLEXIBLE, SCALABLE, EXTENSIBLE, ADAPTABLE, AND REUSABLE." "THE SUBTOPIC OBJECTIVE IS TO ELICIT NOVEL ARCHITECTURAL CONCEPTS AND COMPONENT TECHNOLOGIES THAT ARE REALISTIC AND OPERATE EFFECTIVELY AND CREDIBLY IN ENVIRONMENTS CONSISTENT WITH THE FUTURE NASA SCIENCE MISSIONS."